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? semiconductor components industries, llc, 2012 july, 2012 ? rev. 26 1 publication order number: cat660/d cat660 100 ma cmos charge pump inverter/doubler description the cat660 is a charge ? pump voltage converter. it will invert a 1.5 v to 5.5 v input to a ? 1.5 v to ? 5.5 v output. only two external capacitors are needed. with a guaranteed 100 ma output current capability, the cat660 can replace a switching regulator and its inductor. lower emi is achieved due to the absence of an inductor. in addition, the cat660 can double a voltage supplied from a battery or power supply. inputs from 2.5 v to 5.5 v will yield a doubled, 5 v to 11 v output voltage. a frequency control pin (boost/fc) is provided to select either a high (80 khz) or low (10 khz) internal oscillator frequency, thus allowing quiescent current vs. capacitor size trade ? offs to be made. the 80 khz frequency is selected when the fc pin is connected to v+. the operating frequency can also be adjusted with an external capacitor at the osc pin or by driving osc with an external clock. 8 ? pin soic package is available in the industrial temperature range. the cat660 replaces the max660 and the ltc ? 660. in addition, the cat660 is pin compatible with the 7660/1044, offering an easy upgrade for applications with 100 ma loads. features ? replaces max660 and ltc ? 660 ? converts v+ to v ? or v+ to 2v+ ? low output resistance, 4 typical ? high power efficiency ? selectable charge pump frequency ? 10 khz or 80 khz ? optimize capacitor size ? low quiescent current ? pin ? compatible, high ? current alternative to 7660/1044 ? industrial temperature range ? available in 8 ? pin soic package ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? negative voltage generator ? voltage doubler ? voltage splitter ? low emi power source ? gaas fet biasing ? lithium battery power supply ? instrumentation ? lcd contrast bias ? cellular phones, pagers http://onsemi.com pin configuration soic ? 8 v suffix case 751bd (top view) v+ osc lv out boost/fc cap+ gnd cap ? device package shipping ordering information marking diagrams cat660eva ? gt3 soic ? 8 (pb ? free) 3,000 / tape & reel cat660eva cat660eva = cat660eva ? gt3 1 1. all packages are rohs ? compliant (lead ? free, halogen ? free). 2. for information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our tape and reel packaging specifica- tions brochure, brd8011/d. 3. for detailed information and a breakdown of device nomenclature and numbering systems, please see the on semiconductor device no- menclature document, tnd310/d, available at www.onsemi.com
cat660 http://onsemi.com 2 typical application figure 1. voltage inverter v+ osc lv out cat660 + + v+ osc lv out c1 c1 cat660 1 f to 150 f cap+ gnd cap ? boost/fc 1 2 3 4 8 7 6 5 c2 1 f to 150 f +v in 1.5 v to 5.5 v inverted negative voltage output 8 7 6 5 cap+ gnd cap ? boost/fc 1 2 3 4 1 f to 150 f v in = 2.5 v to 5.5 v 1 f to 150 f c2 doubled positive voltage output figure 2. positive voltage doubler table 1. pin descriptions circuit configuration pin number name inverter mode doubler mode 1 boost/fc frequency control for the internal oscillator. with an external oscillator boost/fc has no effect. same as inverter. boost/fc oscillator frequency open 10 khz typical, 5 khz minimum v+ 80 khz typical, 40 khz minimum 2 cap+ charge pump capacitor. positive terminal. same as inverter. 3 gnd power supply ground. power supply. positive voltage input. 4 cap ? charge pump capacitor. negative terminal. same as inverter. 5 out output for negative voltage. power supply ground. 6 lv low ? voltage selection pin. when the input voltage is less than 3 v, connect lv to gnd. for input voltages above 3 v, lv may be connected to gnd or left open. if osc is driven externally, connect lv to gnd. lv must be tied to out for all input voltages. 7 osc oscillator control input. an external capacitor can be connec- ted to lower the oscillator frequency. an external oscillator can drive osc and set the chip operating frequency. the charge ? pump frequency is one ? half the frequency at osc. same as inverter. do not overdrive osc in doubling mode. standard logic levels will not be suitable. see the applications section for additional information. 8 v+ power supply. positive voltage input. positive voltage output.
cat660 http://onsemi.com 3 table 2. absolute maximum ratings parameters ratings units v+ to gnd 6 v input voltage (pins 1, 6 and 7) ? 0.3 to (v+ + 0.3) v boost/fc and osc input voltage the least negative of (out ? 0.3 v) or (v+ ? 6 v) to (v+ + 0.3 v) v output short ? circuit duration to gnd (out may be shorted to gnd for 1 sec without damage but shorting out to v+ should be avoided.) 1 sec. continuous power dissipation (t a = 70 c) plastic dip soic tdfn 730 500 1 mw mw w storage temperature ? 65 to +160 c lead soldering temperature (10 sec) 300 c operating ambient temperature range ? 40 to +85 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. note: t a = ambient temperature table 3. electrical characteristics (v+ = 5 v, c1 = c2 = 150 f, boost/fc = open, c osc = 0 pf, inverter mode with test circuit as shown in figure 3 unless otherwise noted. temperature is over operating ambient temperature range unless otherwise n oted.) parameter symbol conditions min typ max units supply voltage vs inverter: lv = open, r l = 1 k 3.0 5.5 v inverter: lv = gnd, r l = 1 k 1.5 5.5 doubler: lv = out, r l = 1 k 2.5 5.5 supply current is boost/fc = open, lv = open 0.09 0.5 ma boost/fc = v+, lv = open 0.3 3 output current iout out is more negative than ? 4 v 100 ma output resistance ro i l = 100 ma, c1 = c2 = 150 f (note 5) boost/fc = v+ (c1, c2 esr 0.5 ) 4 7 i l = 100 ma, c1 = c2 = 10 f 12 oscillator frequency (note 6) fosc boost/fc = open 5 10 khz boost/fc = v+ 40 80 osc input current iosc boost/fc = open boost/fc = v+ 1 5 a power efficiency pe r l = 1 k connected between v+ and out, t a = 25 c (doubler) 96 98 % r l = 500 connected between gnd and out, t a = 25 c (inverter) 92 96 i l = 100 ma to gnd, t a = 25 c (inverter) 88 voltage conversion efficiency veff no load, t a = 25 c 99 99.9 % 4. in figure 3, test circuit capacitors c1 and c2 are 150 f and have 0.2 maximum esr. higher esr levels may reduce ef ficiency and output voltage. 5. the output resistance is a combination of the internal switch resistance and the external capacitor esr. for maximum voltage and ef ficiency keep external capacitor esr under 0.2 . 6. fosc is tested with c osc = 100 pf to minimize test fixture loading. the test is correlated back to c osc = 0 pf to simulate the capacitance at osc when the device is inserted into a test socket without an external c osc .
cat660 http://onsemi.com 4 voltage inverter figure 3. test circuit cat660 external oscillator c2 150 f + boost/fc v+ osc lv out c 1 150 f v + 1 2 3 4 cap+ cap ? gnd 8 7 6 5 i s v + 5 v c osc r l i l v out + typical operating characteristics (typical characteristic curves are generated using the test circuit in figure 3. inverter test conditions are: v+ = 5 v, lv = g nd, boost/fc = open and t a = 25 c unless otherwise indicated. note that the charge ? pump frequency is one ? half the oscillator frequency.) figure 4. supply current vs. input voltage figure 5. supply current vs. temperature (no load) input voltage (v) temperature ( c) 6 5 4 3 2 1 0 30 60 90 120 150 125 100 75 50 25 0 ? 25 ? 50 0 20 40 60 80 100 120 figure 6. output resistance vs. input voltage figure 7. output resistance vs. temperature (50 load) input voltage (v) temperature ( c) 6 5 4 3 2 1 0 2 4 6 8 10 125 100 75 50 25 0 ? 25 ? 50 2 3 4 5 6 7 8 input current ( a) input current ( a) output resistance ( ) output resistance ( ) no load vin = 5 v vin = 3 v vin = 2 v 100 load vin = 2 v vin = 3 v vin = 5 v
cat660 http://onsemi.com 5 typical operating characteristics figure 8. inverted output voltage vs. load, v+ = 5 v figure 9. output voltage drop vs. load current load current (ma) load current (ma) 100 80 60 40 20 0 4.0 4.2 4.4 4.6 4.8 5.0 100 80 60 40 20 0 0 0.2 0.4 0.6 0.8 1.0 figure 10. oscillator frequency vs. supply voltage figure 11. oscillator frequency vs. supply voltage supply voltage (v) supply voltage (v) 6 5 4 3 2 0 2 6 8 12 14 18 20 6 5 4 3 2 0 50 100 150 200 figure 12. supply current vs. oscillator frequency oscillator frequency (khz) 1,000 100 10 1 10 100 1,000 10,000 inv. output voltage (v) output voltage (v) frequency (khz) frequency (khz) input current ( a) 4 10 16 boost = open lv = open lv = gnd v+ = 5 v v+ = 3 v boost = +v lv = open lv = gnd no load v+ = 5 v
cat660 http://onsemi.com 6 application information circuit description and operating theory the cat660 switches capacitors to invert or double an input voltage. figure 13 shows a simple switch capacitor circuit. in position 1 capacitor c1 is charged to voltage v1. the total charge on c1 is q1 = c1v1. when the switch moves to position 2, the input capacitor c1 is discharged to voltage v2. after discharge, the charge on c1 is q2 = c1v2. the charge transferred is: q q1 q2 c1 (v1 v2) if the switch is cycled ?f? times per second, the current (charge transfer per unit time) is: i f q f c1 (v1 v2) rearranging in terms of impedance: i (v1 v2) (1 fc1) v1 v2 req the 1/fc1 term can be modeled as an equivalent impedance req. a simple equivalent circuit is shown in figure 14. this circuit does not include the switch resistance nor does it include output voltage ripple. it does allow one to understand the switch ? capacitor topology and make prudent engineering tradeoffs. for example, power conversion efficiency is set by the output impedance, which consists of req and switch resistance. as switching frequency is decreased, req, the 1/fc1 term, will dominate the output impedance, causing higher voltage losses and decreased efficiency. as the frequency is increased quiescent current increases. at high frequency this current becomes significant and the power efficiency degrades. the oscillator is designed to operate where voltage losses are a minimum. with external 150 f capacitors, the internal switch resistances and the equivalent series resistance (esr) of the external capacitors determine the effective output impedance. a block diagram of the cat660 is shown in figure 15. the cat660 is a replacement for the max660 and the ltc660. figure 13. switched ? capacitor building block figure 14. switched ? capacitor equivalent circuit v1 c1 v2 v1 v2 req c2 r l r l c2 req 1 fc1
cat660 http://onsemi.com 7 oscillator frequency control the switching frequency can be raised, lowered or driven from an external source. figure 16 shows a functional diagram of the oscillator circuit. the cat660 oscillator has four control modes: table 4. boost/fc pin connection osc pin connection nominal oscillator frequency open open 10 khz boost/fc = v+ open 80 khz open or boost/fc = v+ external capacitor ? open external clock frequency of external clock if boost/fc and osc are left floating (open), the nominal oscillator frequency is 10 khz. the pump frequency is one ? half the oscillator frequency. by connecting the boost/fc pin to v+, the charge and discharge currents are increased, and the frequency is increased by approximately 8 times. increasing the frequency will decrease the output impedance and ripple currents. this can be an advantage at high load currents. increasing the frequency raises quiescent current but allows smaller capacitance values for c1 and c2. if pin 7, osc, is loaded with an external capacitor the frequency is lowered. by using the boost/fc pin and an external capacitor at osc, the operating frequency can be set. note that the frequency appearing at cap+ or cap ? is one ? half that of the oscillator. driving the cat660 from an external frequency source can be easily achieved by driving pin 7 and leaving the boost pin open, as shown in figure 16. the output current from pin 7 is small, typically 1 a to 8 a, so a cmos can drive the osc pin. for 5 v applications, a ttl logic gate can be used if an external 100 k pull ? up resistor is used as shown in figure 17. figure 15. cat660 block diagram + c2 osc boost/fc osc (7) gnd (3) c1 + (2) sw2 sw1 vout (5) (n) = pin number lv (6) 8x (1) 2 v + (8) closed when v + > 3.0 v cap + (4) cap ?
cat660 http://onsemi.com 8 capacitor selection low esr capacitors are necessary to minimize voltage losses, especially at high load currents. the exact values of c1 and c2 are not critical but low esr capacitors are necessary. the esr of capacitor c1, the pump capacitor, can have a pronounced effect on the output. c1 currents are approximately twice the o utput current and losses occur on both the charge and discharge cycle. the esr effects are thus multiplied by four. a 0.5 esr for c1 will have the same ef fect as a 2 increase in ca t660 output impedance. output voltage ripple is determined by the value of c2 and the load current. c2 is charged and discharged at a current roughly equal to the load current. the internal switching frequency is one ? half the oscillator frequency. vripple iout (fosc c2) iout esrc2 for example, with a 10 khz oscillator frequency (5 khz switching frequency), a 150 f c2 capacitor with an esr of 0.2 and a 100 ma load peak ? to ? peak ripple voltage is 87 mv. table 5. vripple vs. fosc vripple (mv) iout (ma) fosc (khz) c2 ( f) c2 esr ( ) 87 100 10 150 0.2 28 100 80 150 0.2 figure 16. oscillator figure 17. external clocking + c2 required for ttl logic cat660 100 k osc nc + c1 boost/fc v+ osc lv out boost/fc (1) osc (7) ~18 pf i 7.0 i i 7.0 i v + lv (6) input v + ? v + cap+ gnd cap ? 1 2 3 4 8 7 6 5
cat660 http://onsemi.com 9 capacitor suppliers the following manufacturers supply low ? esr capacitors: table 6. capacitor suppliers manufacturer capacitor type phone web email comments avx/kyocera tps/tps3 843 ? 448 ? 9411 www.avxcorp.com avx@avxcorp.com tantalum vishay/sprague 595 402 ? 563 ? 6866 www.vishay.com ? aluminum sanyo mv ? ax, ugx 619 ? 661 ? 6835 www.sanyo.com svcsales@sanyo.com aluminum nichicon f55 847 ? 843 ? 7500 www.nichicon ? us.com ? tantalum hc/hd aluminum capacitor manufacturers continually introduce new series and offer different package styles. it is recommended that before a design is finalized capacitor manufacturers should be surveyed for their latest product offerings. controlling loss in cat660 applications there are three primary sources of voltage loss: 1. output resistance: vloss = iload x rout, where rout is the cat660 output resistance and iload is the load current. 2. charge pump (c1) capacitor esr: vlossc1 4 x esrc1 x iload, where esrc1 is the esr of capacitor c1. 3. output or reservoir (c2) capacitor esr: vlossc2 = esrc2 x iload, where esrc2 is the esr of capacitor c2. increasing the value of c2 and/or decreasing its esr will reduce noise and ripple. the effective output impedance of a cat660 circuit is approximately: rcircuit rout 660 (4 esrc1) esrc2
cat660 http://onsemi.com 10 typical applications voltage inversion positive ? to ? negative the cat660 easily provides a negative supply voltage from a positive supply in the system. figure 18 shows a typical circuit. the lv pin may be left floating for positive input voltages at or above 3.3 v. figure 18. voltage inverter + c2 cat660 nc + c1 boost/fc v+ osc lv out 1 2 3 4 8 7 6 5 cap+ cap ? gnd v in 1.5 v to 5.5 v v out = ? v in positive voltage doubler the voltage doubler circuit shown in figure 19 gives v out = 2 x v in for input voltages from 2.5 v to 5.5 v. figure 19. voltage doubler cat660 + boost/fc + 2.5 v to 5.5 v 1n5817* *schottky diode is for start ? up only v+ osc lv out c2 150 f v out = 2v in 8 7 6 5 1 2 3 4 c1 150 f cap+ cap ? gnd v in
cat660 http://onsemi.com 11 precision voltage divider a precision voltage divider is shown in figure 20. with very light load currents under 100 na, the voltage at pin 2 will be within 0.002% of v+/2. output voltage accuracy decreases with increasing load. figure 20. precision voltage divider (load 100 na) + + boost/fc v+ osc lv out cat660 c2 150 f c1 150 f 1 2 3 4 cap+ cap ? gnd 8 7 6 5 3 v to 11 v v + i l 100 na 0.002% v 2 battery voltage splitter positive and negative voltages that track each other can be obtained from a battery. figure 21 shows how a 9 v battery can provide symmetrical positive and negative voltages equal to one ? half the battery voltage. figure 21. battery splitter + cat660 + boost/fc v+ osc lv out 9 v battery v bat c1 150 f 3 v v bat 11 v 1 cap+ cap ? gnd 2 3 4 8 7 6 5 c2 150 f v bat 2 ( ? 4.5 v) v bat 2 (4.5 v)
cat660 http://onsemi.com 12 cascade operation for higher negative voltages the cat660 can be cascaded as shown in figure 22 to generate more negative voltage levels. the output resistance is approximately the sum of the individual cat660 output resistance. v out = ? n x v in , where n represents the number of cascaded devices. figure 22. cascading to increase output voltage + c2 4 8 5 + c1 + cat660 4 8 5 c1 + c2 v out = ? nv in 3 2 ?n? cat660 ?1? 3 2 +v in parallel operation paralleling cat660 devices will lower output resistance. as shown in figure 23, each device requires its own pump capacitor, c2, but the output reservoir capacitor is shared with all devices. the value of c2 should be increased by a factor o f n, where n is the number of devices. the output impedance of the combined cat660?s is: r out (of ?n? cat660 s) r out (of the cat660) n (number of devices) figure 23. paralleling devices reduce output resistance + c2 4 8 5 + c1 + 4 8 5 c1 cat660 3 2 ?n? cat660 ?1? 3 2 +v in
cat660 http://onsemi.com 13 package dimensions soic 8, 150 mils case 751bd ? 01 issue o e1 e a a1 h l c e b d pin # 1 identification top view side view end view notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec ms-012. symbol min nom max a a1 b c d e e1 e h 0o 8o 0.10 0.33 0.19 0.25 4.80 5.80 3.80 1.27 bsc 1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 l 0.40 1.27 1.35 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 cat660/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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